NVIC Nested Vectored Interrupt Controller (NVIC)

NVIC features:

16 Cortex-M4 exceptions, 34 maskable interrupt channels
16 programmable priority levels
Support vector table relocation
Low-latency exception and interrupt handling
Implementation of System Control Registers

The NVIC and the processor core interface are closely coupled, which enables low latency interrupt processing and efficient processing of late arriving interrupts. All interrupts including the core exceptions are managed by the NVIC.

Interrupt Vector Table

Exception Number	NVIC Number	Exception Type	Description
1	X	Reset	Reset
2	X	NMI	Nonmaskable interrupt
3	X	Hard Fault	All fault conditions if the corresponding fault handler is not enabled
4	X	Mem Fault	Memory management fault; Memory Protection Unit (MPU) violation or access to illegal locations
5	X	Bus Fault	Bus error
6	X	Usage Fault	Exceptions resulting from program error
7	X	Soft Fault	Software error
11	X	SVC	Supervisor Call
12	X	Debug Monitor	Debug monitor (breakpoints, watch points, or external debug requests)
14	X	PendSV	Pendable Service Call
15	X	SYSTICK	System Tick Timer
16	0	BT BB COMBO	BLE event
17	1	BB_NATIVE_INT	Baseband sleep wake
18	2	DMA COMBO	DMA interrupt
19	3	PIN_WAKEUP_INT	GPIO wakeup interrupt
20	4	TIMER COMBO	Timer interrupt
21	5	2P4G_RF_IRQ	Proprietary 2.4G protocol interrupt
22	6	PMU_POF_INT	Flash low voltage interrupt
23	7	PMU_TIMER	System timer
24	8	WDT_INT	Watch dog interrupt
25	9	UART1 COMBO	UART1 global interrupt
26	10	EFUSE_INT	EFUSE interrupt
27	11	GPIO COMBO	GPIO interrupt
28	12	ADC	GPADC interrupt
29	13	I2C_INT	I2C interrupt
30	14	SFLASH INT	SFLASH control interrupt
31~38	15~22	SOFT_INT	Soft interrupt
40	24	CRY32M_DIG_READY	32M crystal oscillator can give digital flag
41	25	UART0 INT	UART0 interrupt
42	26	SPI0_INT	SPI0 interrupt
43~46	28~30	TIMER	Timers global interrupt
47	31	SPI1 INT	SPI1 interrupt
48	32	RTC_1HZ_INT	RTC 1HZ interrupt
49	33	RTC_AF_INT	RTC alarm interrupt
50	34	LP_TIMER_INT	LP timer interrupt