145 lines
6.3 KiB
C
145 lines
6.3 KiB
C
/**
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*****************************************************************************************
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* Copyright(c) 2020, Realtek Semiconductor Corporation. All rights reserved.
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*****************************************************************************************
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* @file otp_config.h
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* @brief Update Configuration in APP
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* @date 2020.03.10
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* @version v1.1
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* *************************************************************************************
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* @attention
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* <h2><center>© COPYRIGHT 2020 Realtek Semiconductor Corporation</center></h2>
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* *************************************************************************************
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*/
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/*============================================================================*
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* Define to prevent recursive inclusion
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*============================================================================*/
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#ifndef OTP_CONFIG_H
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#define OTP_CONFIG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "rtl876x_wdg.h"
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/*============================================================================*
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* debug configuration
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*============================================================================*/
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/** @brief just for OTA Demo test */
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#define OTA_TEST 0
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/** @brief just for OTA Demo test */
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#define OTA_TEST_BANK_SWITCH 0
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#if (OTA_TEST_BANK_SWITCH == 0)
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#define OTA_TEST_IMAGE_VERSION 0
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#endif
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/** @brief just for debug */
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#define SYSTEM_TRACE_ENABLE 0
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/*============================================================================*
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* flash configuration
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*============================================================================*/
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/** @brief support for puran flash*/
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#define FTL_APP_CALLBACK_ENABLE 0
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/** @brief modify ftl logic space size to adjust the RAM footprint of the ftl Mapping Table
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* PAGE_ELEMENT_DATA_NUM = ((FMC_PAGE_SIZE / 8) - 1).
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* MAX_LOGICAL_ADDR_SIZE = (((PAGE_ELEMENT_DATA_NUM * (g_page_num - 1)) - 1) << 2)
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* if sector size is 4KB, PAGE_ELEMENT_DATA_NUM equal 511.
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* g_page_num = ftl physical size / FMC_PAGE_SIZE. so if ftl size is 16KB, g_page_num is 4.
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* example: default ftl size in flash layout is 16KB, MAX_LOGICAL_ADDR_SIZE = 0x17F0 = 6128
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* FTL_REAL_LOGIC_ADDR_SIZE must be less or equal MAX_LOGICAL_ADDR_SIZE, otherwise will init ftl fail.
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*/
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#define FTL_REAL_LOGIC_ADDR_SIZE (2 * 1024)
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/** @brief enable BP, set lock level depend on flash layout and selected flash id */
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#define FLASH_BLOCK_PROTECT_ENABLE 0
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/** @brief modify delay time for wakeup flash from power down mode to standby mode*/
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#define AFTER_TOGGLE_CS_DELAY 6
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/*============================================================================*
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* platform configuration
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*============================================================================*/
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/** @brief default enable swd pinmux */
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#define SWD_PINMUX_ENABLE 0
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/** @brief enable aon wdg which continue work in dlps state */
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#define AON_WDG_ENABLE 1
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/** @brief set aon wdg timeout period in seconds, max value is 65s */
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#define AON_WDG_TIME_OUT_PERIOD_SECOND 4
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/** @brief default disable watch dog in rom */
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#define ROM_WATCH_DOG_ENABLE 0
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/** @brief set wdg mode, default reset all */
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#define ROM_WATCH_DOG_MODE RESET_ALL
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/** @brief Watch Dog Timer Config, default 4s timeout
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* div_factor: 16Bit: 32.768k/(1+divfactor).
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* cnt_limit: 2^(cnt_limit+1) - 1 ; max 11~15 = 0xFFF.
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* wdg_mode:
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* 1: RESET_ALL_EXCEPT_AON
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* 3: RESET_ALL
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**/
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#define ROM_WATCH_DOG_CFG_DIV_FACTOR 31
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#define ROM_WATCH_DOG_CFG_CNT_LIMIT 15
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/*before wdg system reset, write reset reason to specific flash addr if enable*/
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#define WRITE_REASON_TO_FLASH_BEFORE_RESET_ENABLE 0
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#if (WRITE_REASON_TO_FLASH_BEFORE_RESET_ENABLE > 0)
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/*write reset reason to specific flash address*/
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#define REBOOT_REASON_RECORD_ADDRESS 0x8cb000
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/** @brief The maximum number of reboot records is 2^(n-1). Each reset reason record requires 8 bytes, occupied flash size is 2^(n+2) bytes. */
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#define REBOOT_REASON_RECORD_LIMIT_POWERT2 10 //reserve 4KB
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#endif
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/** @brief to fix bug need disable dump callstack info before WDG_SystemReset, default enable */
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#define DUMP_INFO_BEFORE_RESET_DISABLE 1
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/*============================================================================*
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* upperstack configuration
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*============================================================================*/
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#define BT_STACK_CONFIG_ENABLE
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#ifdef BT_STACK_CONFIG_ENABLE
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void bt_stack_config_init(void);
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#endif
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/*============================================================================*
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* OTA configuration
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*============================================================================*/
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/*If support unsafe single bank ota user data, must define the following macros */
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#define SUPPORT_SINGLE_BANK_OTA_USER_DATA
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#ifdef SUPPORT_SINGLE_BANK_OTA_USER_DATA
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#define USER_DATA_START_ADDR 0x00840000 //back 8M(0x1000000) or 0x00840000
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#define USER_DATA_MAX_SIZE (1025 * 1024) //1M+1K
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#endif
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/*normal ota timeout settings*/
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#define OTA_TIMEOUT_TOTAL 240
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#define OTA_TIMEOUT_WAIT4_CONN 60
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#define OTA_TIMEOUT_WAIT4_IMAGE_TRANS 200
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#define OTA_TIMEOUT_CTITTV 0xFF
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/*============================================================================*
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* timer configuration
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*============================================================================*/
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/*default sw timer number is 32*/
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#define TIMER_MAX_NUMBER 48
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/*default sw timer task stack size is 1KB*/
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#define TIMER_TASK_STACK_SIZE (256 * 4)
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/*============================================================================*
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* app configuration
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*============================================================================*/
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//add more here
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#ifdef __cplusplus
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}
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#endif
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/** @} */ /* End of group OTP_CONFIG */
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#endif
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/******************* (C) COPYRIGHT 2020 Realtek Semiconductor Corporation *****END OF FILE****/
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